Learn Circuit,Digital Logic Gates, Design,Digital Device Signal & processing

Digital Electronics is an important subject, common for Electrical, Electronics, and Instrumentation Engineering students. It deals with the theory and practical knowledge of Digital Systems and how they are implemented in various digital instruments. This App have been developed based on the latest GATE syllabus and will be useful for Electronics Engineering students as well as for GATE, IES and other PSU exams preparation.

Digital Electronics is an Electronics that uses binary numbers of 1 and 0 to represent information

1. Number Base System

1.1 Logic Operations

1.2 Mathematical Operations

1.3 Building Circuits with Breadboards

1.4 Digital Logic Gates

2. Logic Gates

2.1 Logic Gates/Fundamental Digital Gates

2.2 Logic Gates/Combinational Gates

2.3 Logic Gates/Basic Logic Gates Summary

2.4 Logic Gates Summary

3. Digital Device

3.1 Mathematic and Logic Operations

3.2 Synchronous Device

3.3 Asynchronous Device

4. Digital Signal Processing

4.1 Digital Data

4.2 Data Encoder

4.3 Data Selector

5. Digital Controllers

5.1 Controller Concepts

5.2 Arduino

5.3 Blinking Light

6. Communication Standards

6.1 Open Standards

6.2 ANSI

6.3 ISO

Some of the topics Covered in the app are:

1. Decimal System

2. Binary System

3. Representing Binary Quantities

4. Octal and Hexadecimal System

5. Binary-To-Decimal and Decimal-to-binary Conversion

6. Binary-To-Octal / Octal-To-Binary Conversion

7. Hexadecimal to Decimal/Decimal to Hexadecimal Conversion

8. Binary-To-Hexadecimal /Hexadecimal-To-Binary Conversion

9. Floating-Point Numbers

10. Binary Codes

11. Non Weighted Codes

12. Binary - Gray Code Conversion

13. Gray Code - Binary Conversion

14. Gray Code Applications

15. Alphanumeric Codes-ASCII code

16. EBCDIC code

17. Seven-segment Display Code

18. Error Detecting Codes

19. Error Correcting Codes.

20. Boolean Switching Algebras

21. Boolean Algebra Theorems

22. Minterms and Maxterms

23. Sum Of Products (SOP) and Product Of Sum (POS)

24. AND-Logic Gate

25. OR-Logic Gate

26. NOT-Logic Gate

27. NAND-Logic Gate

28. NOR-Logic Gate

29. XNOR-Logic Gate

30. Universal Gates

31. Realization of logic function using NAND gates

32. Realization of logic gates using NAND gates

33. Realization of logic function using NOR gates

34. Realization of logic gates using NOR gates.

35. Tristate Logic Gates

36. AND-OR-INVERT Gates

37. Schmitt Gates

38. Karnaugh Maps

39. Minimization Technique

40. 2-Variable K-Map

41. Grouping/Circling K-maps

42. Example of 2-Variable K-Map groups

43. 3-Variable K-Map

44. Example of 3-Variable K-Map

45. 4-Variable K-Map

46. Example of 4-Variable K-Map

47. 5-Variable K-Map

48. QUINE-Mccluskey minimization

49. QUINE-Mccluskey minimization Method-Example

50. Multiplexer

51. 2x1 Multiplexer

52. Design of a 2:1 Mux

53. 4:1 MUX

54. 8-to-1 multiplexer from Smaller MUX

55. 16-to-1 multiplexer from 4:1 mux

56. De-multiplexers

57. Mechanical Equivalent of a De-Multiplexer

58. 1-to-4 De-multiplexer

59. Boolean Function Implementation using Mux and de-Mux

60. 3-variable Function Using 4-to-1 mux

61. 2 to 4 Decoder using Demux

62. Arithmetic circuits-Adders

63. Full Adder

64. Full Adder using AND-OR

65. n-bit Carry Ripple Adder

66. 4-bit Carry Ripple Adder

67. Carry Look-Ahead Adder

68. BCD Adder

69. 2-digit BCD Adder

70. Subtracter

71. Full Subtracter

72. Parallel Binary Subtracter

73. Serial Binary Subtracter.

74. Comparators

75. Encoders

76. Decimal-to-Binary Encoder

77. Priority Encoder

78. Introduction to Sequential Circuit

79. Concept of Sequential Logic

80. Input enable signals

81. RS Latch

82. RS Latch with Clock

83. Setup and Hold Time

84. D Latch

85. JK Latch

86. T Latch

87. R-S Flip-Flop with Active LOW Inputs

88. R-S Flip-Flop with Active HIGH Inputs

89. R-S Flip-Flop Implementation with NOR gates

90. Clocked R-S Flip-Flop

Digital Electronics is part of electronics engineering education courses and technology degree programs of various universities.